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  • 标题:The Environment for Mapping SystemC Multi-module Specifications onto NoC Architectures
  • 本地全文:下载
  • 作者:Stanislaw Deniziak ; Robert Tomaszewski
  • 期刊名称:The Open Cybernetics & Systemics Journal
  • 电子版ISSN:1874-110X
  • 出版年度:2008
  • 卷号:2
  • 期号:1
  • 页码:142-152
  • DOI:10.2174/1874110X00802010142
  • 出版社:Bentham Science Publishers Ltd
  • 摘要:

    This work presents a methodology for mapping of a SystemC specification onto a given Network-on-Chip (NoC) architecture, for the purpose of FPGA prototyping. A communication protocol and routing tables are generated automatically using inter-module communication analysis. For each processor in the target architecture, assigned SystemC processes are converted into C++ programs, where all communication method calls are replaced with sending/receiving messages to/from the network interface (NI) process. For each module implemented in hardware a VHDL code of the NI is generated. NIs convert transmitted data into/from network packets according to the communication protocol. The main advantage of our approach is the possibility to prototype and to evaluate many NoC architectures for a given system, without the necessity of modification of the source system specification. Presented embedded HTTP server example substantiates the benefits of the methodology.

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