期刊名称：Eastern-European Journal of Enterprise Technologies
印刷版ISSN：1729-3774
电子版ISSN：1729-4061
出版年度：2016
卷号：4
期号：4
页码：4-10
DOI：10.15587/1729-4061.2016.75596
语种：English
出版社：PC Technology Center
摘要：At present, requirements for speed performance and noise immunity in the work of the counters increase. Among the existing structures, the Fibonacci counters meet such requirements. Their drawback is transfer while calculating from the minimal form of representation of the Fibonacci numbers to the maximal form and, consequently, to the use of operations of convolution and deconvolution, which decreases speed, noise immunity and increases required hardware expenses.We propose for the Fibonacci counters to use only minimal form of representation of the Fibonacci numbers, which excludes operations of convolution and deconvolution. Based on it, the method of the Fibonacci calculation in the minimal form is developed and its logical model is built in the form of a set of logical operations, whose fulfillment leads to the Fibonacci calculation. It gives the possibility to design the method of synthesis of the Fibonacci counters with the optimal ratio of performance speed, noise immunity and amount of hardware expenses for specific conditions of its work.The advantage of the Fibonacci counters with the minimal form is their increased noise immunity. It is due to both the nature of the Fibonacci calculation itself, which works in the excess codes, and to the absence of transfers to the maximal form, where it is permitted to have the forbidden combinations. In this case, the probability of detecting errors grows with an increase in the number of bits of counter.
