摘要：This paper presents the optimization of a novel low-voltage (LV) and low-power (LP) bulk driven current conveyor (CCII). For the bulk-driven circuits, the transistors are biased at the subthreshold regime for LV and LP operation. In contrast, the input transistors of the differential stage are controlled from the bulk terminals to achieve a rail-to-rail input voltage range. A simulation-based technique is adapted for the optimal design of LV-LP bulk driven CCII, using the single-objective particle swarm optimization (PSO) algorithm. It is designed using CMOS 0.18 μm technology to operate at a voltage of 0.3 V and have a power consumption of 37 nW. Optimization results and also process/temperature corner results confirm the correct operation of the designed circuit.
