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  • 标题:Analysis of an Application Specific Instruction-set Processor's expansion potential, considering performance and implementation effort
  • 本地全文:下载
  • 作者:Florian Fricke ; Michael Hübner ; Marc Reichenbach
  • 期刊名称:IFAC PapersOnLine
  • 印刷版ISSN:2405-8963
  • 出版年度:2022
  • 卷号:55
  • 期号:4
  • 页码:260-265
  • DOI:10.1016/j.ifacol.2022.06.043
  • 语种:English
  • 出版社:Elsevier
  • 摘要:AbstractModern embedded systems need to provide high compute power while being energy efficient. This can be achieved by domain specific processing cores and accelerators that have been optimized for a specific class of applications. The optimizations can be introduced in the structure of the memory system, the instruction set architecture, special instructions that are provided and in the interfaces that allow the coupling of external accelerators. In this work we investigated the opportunities to adopt a processor by introducing different instruction set extensions, the creation of manually designed instruction extensions for special applications and the extension of the core by a Very Large Instruction Word (VLIW) extension. All modifications have been analyzed using a benchmark suite with applications from different domains. In addition to performance measurements, we rated the effort, that specific extensions introduce to the hard- and the software-designer. All experiments have been done using the Cadence Tensilica Xtensa LX Application Specific Instruction-set Processor (ASIP) in the cycle-accurate simulation mode. Or work shows, that speedups of 4x can be reached by just adding around 10% of gates to the processor. For this kind of analysis, we show an evaluation methodology and introduce a metric.
  • 关键词:KeywordsEmbedded SystemsApplication Specific Instruction SetASIP
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