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文章基本信息

  • 标题:Delay Testing: Improving Test Quality and Avoiding Over-testing
  • 本地全文:下载
  • 作者:Seiji Kajihara ; Satoshi Ohtake ; Tomokazu Yoneda
  • 期刊名称:Information and Media Technologies
  • 电子版ISSN:1881-0896
  • 出版年度:2011
  • 卷号:6
  • 期号:4
  • 页码:1053-1066
  • DOI:10.11185/imt.6.1053
  • 出版社:Information and Media Technologies Editorial Board
  • 摘要:Delay testing is one of key processes in production test to ensure high quality and high reliability for logic circuits. Test escape missing defective chips can be reduced by introducing delay testing. On the other hand, we need to concern yield loss caused by delay testing, i.e., over-testing. Many methods and techniques have been developed to solve problems on delay testing. In this paper, we introduce fundamental techniques of delay testing and survey recent problems and solutions. Especially we focus on techniques to enhance test quality, to avoid over-testing, and to make test design efficient by treating circuits described at register transfer level.
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