期刊名称：International Journal of Wireless and Microwave Technologies(IJWMT)
印刷版ISSN：2076-1449
电子版ISSN：2076-9539
出版年度：2015
卷号：5
期号：5
页码：10-24
DOI：10.5815/ijwmt.2015.05.02
出版社：MECS Publisher
摘要：This paper presents a highly efficient modified output combining 3-stage Doherty Power Amplifier (DPA) design using low power LDMOS transistor for Band 40, TD-LTE Micro eNodeB. In this design, modified output combining technique has been used in the output section which meets the output power requirements of Micro eNodeB which cannot be achieved by conventional 3-stage DPA. The modified DPA design achieves 65.3% power added efficiency (PAE) at 39 dBm average output power with 20 MHz LTE signal using 15 watt LDMOS Transistor. 3-stage modified output combining technique increases the linear output power by 1.1 dB and increases the Gain flatness versus power level. The use of Digital Pre-Distortion (DPD) along with modified 3-stage DPA design achieves the linearity requirements as per the 3GPP specifications. The modified DPA combining technique has provided potential economical solution by using low power LDMOS transistor with an advantage of high efficiency.
