出版社：Electronics and Telecommunications Research Institute
摘要：We investigate the effects of interfacial dielectric layers (IDLs) on the electrical properties of top-gate In-Ga-Zn-oxide (IGZO) thin film transistors (TFTs) fabricated at low temperatures below , using a target composition of In:Ga:Zn = 2:1:2 (atomic ratio). Using four types of TFT structures combined with such dielectric materials as and , the electrical properties are analyzed. After post-annealing at for 1 hour in an ambient, the sub-threshold swing is improved in all TFT types, which indicates a reduction of the interfacial trap sites. During negative-bias stress tests on TFTs with a IDL, the degradation sources are closely related to unstable bond states, such as Si-based broken bonds and hydrogen-based bonds. From constant-current stress tests of = 3 , an IGZO-TFT with heat-treated IDL shows a good stability performance, which is attributed to the compensation effect of the original charge-injection and electron-trapping behavior.
