出版社：Electronics and Telecommunications Research Institute
摘要：We propose a new process technique for fabricating very high-density trench MOSFETs using 3 mask layers with oxide spacers and a self-aligned technique. This technique reduces the device size in trench width, source, and p-body region with a resulting increase in cell density and current driving capability as well as cost-effective production capability. We were able to obtain a higher breakdown voltage with uniform oxide grown along the trench surface. The channel density of the trench DMOSFET with a cell pitch of 2.3-2.4 was 100 Mcell/ and a specific on-resistance of 0.41 was obtained under a blocking voltage of 43 V.
