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  • 标题:Design of Area and Speed Efficient Square Root Carry Select Adder Using Fast Adders
  • 本地全文:下载
  • 作者:Sanjeev. K ; Sivananda Hariprasth ; Saranya. M
  • 期刊名称:International Journal of Soft Computing & Engineering
  • 电子版ISSN:2231-2307
  • 出版年度:2015
  • 卷号:5
  • 期号:4
  • 页码:129-132
  • 出版社:International Journal of Soft Computing & Engineering
  • 摘要:Area and speed are the most important design objectives in integrated circuits. As addition is the basic operation of all computer arithmetic, adders are one of the widely used components in digital integrated circuit design. Since propagation of carry is of major concern in designing efficient adders, this paper presents different fast adders and their performance analysis. Among all the adders discussed Square root Carry Select Adder (SQCSA) provides a good compromise between cost and performance. As, Conventional SQCSA is still area consuming due to dual Ripple Carry Adder(RCA)structures, modifications are done at gate level to reduce area. Modified SQCSA is designed using fast adders like Carry Skip Adder (CSA) and Carry Look-Ahead Adder (CLA) to increase the speed of operation.
  • 关键词:(SQCSA); (CLA); (CSA); Conventional; designed;Carry; Adder; concern; adders; Among; Modified
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