期刊名称：International Journal on Electrical Engineering and Informatics
印刷版ISSN：2085-6830
出版年度：2015
卷号：7
期号：2
DOI：10.15676/ijeei.2015.7.2.4
出版社：School of Electrical Engineering and Informatics
摘要：Low power design has become popular nowadays because ofdevelopment ofimproveddata converters with high resolution in CMOS process. Electronic devicemanufacturersare competing each other to produce devices that can extend battery life,have inexpensive packaging and cooling systems as well as reduce the size.Theobjective of this paper is to review various low power designs in digital to analogconverters (DAC). The methods used to reduce the power consumption are presented indetails. We focused the designs in the segmentation current steering DACs, as most ofthe low power designs illustarted in literatures are based on this architecture. From thisreview, we find that triple segmented architectureand spike free switching can reducethe power consumption effectively. This review paper can be a reference for theresearchers and engineers to develop low power CMOS DACsfor various applications
关键词：Digital to analog converter; low power; segmentation; current steering;CMOS
