期刊名称：International Journal of Innovative Research in Computer and Communication Engineering
印刷版ISSN：2320-9798
电子版ISSN：2320-9801
出版年度：2013
卷号：1
期号：4
出版社：S&S Publications
摘要：Comparator is one of the most widely used building block for analog and mixed signal systems. For theimplementation of high-performance CMOS A/D converters, low offset comparators are essential. In this paper, dynamiccomparator offset is calculated to the extent of high accuracy. The offset so calculated has been reduced by the chargestorage techniques to achieve an efficient design. In addition to the offset, propagation delay and power dissipation, beingthe important parameter of the comparator, has been analyzed. It is observed that offset voltage in the comparator has beenreduced to 350μV for output offset storage technique and 400μV for input offset storage techniques from 91mV. In thispaper, BPTM model has been used in analyze the dynamic comparator.
