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  • 标题:Design and Implementation of Stegnosystem using VLSI
  • 本地全文:下载
  • 作者:M. Karthik ; T. Karthik ; M. Darani Kumar
  • 期刊名称:International Journal of Innovative Research in Computer and Communication Engineering
  • 印刷版ISSN:2320-9798
  • 电子版ISSN:2320-9801
  • 出版年度:2013
  • 卷号:1
  • 期号:4
  • 出版社:S&S Publications
  • 摘要:With rapid increases in communication and network applications, Steganography has become a crucial issue to ensure the security of transmitted information. An algorithmic optimization or refinement can thus be made at a higher level based on the Reconfigurable data path. Experimental results show that the developed processor has full cryptography algorithm flexibility, high hardware utilization, and high performance[1]. In this paper propose a scheme to meet this need by incorporating a watermarki ng solution into a traditional crypto signature scheme to make the digital signatures robust to image degradations. The proposed approach is compatible with traditional crypto signature schemes except that the original image needs to be watermarked in orde r to guarantee the robustness of its derived digital signature. The proposed approach demonstrates the effectiveness of this proposed scheme through practical experimental results as well as illustrative analysis. Steganography seems to be much better than traditional encryption methods used today. Steganography is the new direction of cryptography. It makes use of chaotic system properties such as sensitive to initial condition and loss of information. In order to reach higher performance, these methods ta ke advantage of the more and more complex behavior of chaotic si gnals. This paper contributes by comparing and analyzing the performance of the past Steganography schemes.
  • 关键词:3D ; DWT; Compression; Lifting Scheme Algorithm; SHA; Encryption and Decry ; ption
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