期刊名称:International Journal of Electronics Communication and Computer Engineering
印刷版ISSN:2249-071X
电子版ISSN:2278-4209
出版年度:2012
卷号:3
期号:1
页码:53-56
出版社:IJECCE
摘要:The fundamental building blocks of a SoC (System on Chip) are its intellectual property (IP) cores, which are reusable hardware blocks designed to perform a particular task. For realizing SoC application, IP used may be customized to save silicon Area. With the abundance of proprietary and free IPs, and customized software, significant improvement in the overall system performance can be achieved. Low cost FPGAs, such as Spartan family from Xilinx, can be used effectively to demonstrate power and purpose of hardware software co-designed systems. In this paper, we establish, from the experimental results, that at the cost of small silicon area, one can get significant improvement in speed, by properly conceiving Hardware Software (HW/SW) Co-design. Entire System is implemented using Microblaze soft-core from Xilinx and tested on Spartan 3E Starter kit with Xilinx EDK (Embedded Development Kit).
关键词:FPGA; SoC; intellectual property IP cores; hardware software co design