期刊名称:International Journal of Electronics Communication and Computer Engineering
印刷版ISSN:2249-071X
电子版ISSN:2278-4209
出版年度:2013
卷号:4
期号:3
页码:767-773
出版社:IJECCE
摘要:We propose to design a Low-Power Memory-Reduced Traceback MAP iterative decoding of convolutional turbo code (CTC) which has large data access with large memories consumption and verify the functionality by using simulation tool. The traceback maximum a posteriori algorithm (MAP) decoding provides the best performance in terms of bit error rate (BER) and reduce the power consumption of the state metric cache (SMC) without losing the correction performance. The computation and accessing of different metrics reduce the size of the SMC with no requires complicated reversion checker, path selection, and reversion flag cache. Radix-2*2 and radix-4 traceback structures provide a tradeoff between power consumption and operating frequency for double-binary (DB) MAP decoding. These two traceback structures achieve an around 25% power reduction of the SMC, and around 12% power reduction of the DB MAP decoders for WiMAX standard
关键词:Low Power Design; Maximum a Posteriori MAP Algorithm; Turbo Decoder