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  • 标题:D}esign and Simulation of Pipelined FFT Processor Using {FPGA
  • 本地全文:下载
  • 作者:Reddy, N. A. ; Rao, D. S
  • 期刊名称:International Journal of Electronics Communication and Computer Engineering
  • 印刷版ISSN:2249-071X
  • 电子版ISSN:2278-4209
  • 出版年度:2013
  • 卷号:4
  • 期号:5
  • 页码:1361-1365
  • 出版社:IJECCE
  • 摘要:A parallel and pipelined Fast Fourier Transform (FFT) processor for use in the Orthogonal Frequency division Multiplexer (OFDM). Unlike being stored in the traditional ROM, the twiddle factors in our pipelined FFT processor can be accessed directly. A novel simple address mapping scheme and the modified radix 4 FFT also proposed. Finally, the pipelined 64-point FFT processor can be completely implemented within 20.093ns
  • 关键词:OFDM; FFT; DIF; Radix- 4; FPGA
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