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  • 标题:A New Technique for Low Power Double Tail Comparator Using Parallel Mechanism
  • 本地全文:下载
  • 作者:Remya Ayyappan
  • 期刊名称:International Journal of Engineering and Computer Science
  • 印刷版ISSN:2319-7242
  • 出版年度:2015
  • 卷号:4
  • 期号:3
  • 页码:10751-10754
  • 出版社:IJECS
  • 摘要:Comparators are the most analyzing unit in the analog to digital converters. In suchsituation we have to use the high speed and the low power consumption based comparators. Hence weare designing the comparators is more challenging when the supply voltage is smaller. To achievehigh speed, larger transistors are required to compensate the reduction of supply voltage, which alsomeans that more die area and power is needed. In this paper we are presenting the low power andhigh speed comparators even in small supply voltages. This comparator design having the small countof transistors which is used to reduce the delay time. Apart from technological modifications,developing new circuit structures which avoid stacking too many transistors if they do not increasethe circuit complexity.
  • 关键词:Double-tail comparator;dynamic clocked comparator; high speed;analog to digital converters; low power;analog design.
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