期刊名称：International Journal of Innovative Research in Computer and Communication Engineering
印刷版ISSN：2320-9798
电子版ISSN：2320-9801
出版年度：2014
卷号：2
期号：8
出版社：S&S Publications
摘要：This paper enumerates low power, high speed design of C2CMOS Flip-Flop. As this flip flop topologieshave small area and low power consumption, they can be used in various applications like digital VLSI clockingsystem, buffers, registers, microprocessors etc. The Flip-Flop is analyzed at 22nm technologies. The above designedFlip-Flop is compared in terms of its area, transistor count, power dissipation and propagation delay using DSCH andMicrowind tools with C2CMOS Flip-Flop using 90nm. As chip manufacturing technology is suddenly on the thresholdof major evaluation, which shrinks chip in size and performance is implemented in layout level which develops the lowpower consumption chip using recent CMOS micron layout tools.
关键词：C2CMOS; 22nm technology; Power dissipation; Propagation delay
