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  • 标题:Implementation of High Speed Low Power Split-SAR ADCs
  • 本地全文:下载
  • 作者:M. Ranjithkumar ; C.Selvi ; M.Bhuvaneswaran
  • 期刊名称:International Journal of Innovative Research in Computer and Communication Engineering
  • 印刷版ISSN:2320-9798
  • 电子版ISSN:2320-9801
  • 出版年度:2014
  • 卷号:2
  • 期号:11
  • 出版社:S&S Publications
  • 摘要:This paper analyzes the parasitic effects in SAR ADCs. Which achieves a significant switching energysaving when compared with set-and-down and charge-recycling switching approaches. Successive approximationtechnique in ADC is well known logic, where in the presented design the linearity analysis of a SuccessiveApproximation Registers (SAR) Analog-to-Digital Converter (ADC) with split DAC structure based on two switchingmethods: VCM -based switching, Switch to switchback process. The main motivation is to implement design ofcapacitor array DAC and achieve high speed with medium resolution using 45nm technology. The current SARarchitecture has in built sample and hold circuit, so there is significant saving in chip area. The other advantage ismatching of capacitor can be achieved better then resistor. Which is verified by behavioural Measurement results ofpower, speed, resolution, and linearity clearly show the benefits of using VCM-based switching? In the proposed designthe SAR ADC is designed in switch to switchback process such a way that the control module completely control thesplitting up of modules, and we planning to give an option to change the speed of operation using low level input bits.A dedicated multiplexer is designed for that purpose system.
  • 关键词:Linearity analysis; linearity calibration; resolution SAR ADCs; split DAC; VCM-based switching;switch to switch back process.
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