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  • 标题:Review on Low Power Design Using Comparator for VLSI Design Circuit
  • 本地全文:下载
  • 作者:Uttam Kumar ; Ashish Raghuwanshi
  • 期刊名称:International Journal of Innovative Research in Computer and Communication Engineering
  • 印刷版ISSN:2320-9798
  • 电子版ISSN:2320-9801
  • 出版年度:2014
  • 卷号:2
  • 期号:12
  • 出版社:S&S Publications
  • 摘要:The zone of low power and rapid planning of simple to-advanced converters (Adcs) has been atesting issue in the course of the most recent decade. The rate improvement of serial connections and the risingcorrespondence advances has slanted numerous analysts towards change of force and pace determinations. Thesignificant building piece overseeing these particulars is the comparator. In present day VLSI plan the transistormeasuring and scaling has an impressive effect. There are exceptionally fundamental two compels, which needsgenuine thoughtfulness regarding the VLSI chip creator are fast and low power utilization. Subsequently in thispaper a 8-bit 3 Gs/sec blaze simple to-advanced converter (ADC) in 45nm CMOS innovation is exhibited forlow power and fast framework on-chip (Soc) applications.
  • 关键词:Power Dissipation System-on-chip based design; flash ADC; Threshold Inverter Quantization;technique; Modern VLSI design; CMOS process technology.
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