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  • 标题:Designing of Low Power Low Area Arithmetic and Logic Unit
  • 本地全文:下载
  • 作者:Ajay Kumar Sharma ; Anshul Jain
  • 期刊名称:International Journal of Innovative Research in Computer and Communication Engineering
  • 印刷版ISSN:2320-9798
  • 电子版ISSN:2320-9801
  • 出版年度:2014
  • 卷号:2
  • 期号:12
  • 出版社:S&S Publications
  • 摘要:Low power is challenging work in processor design. Implementing power optimization on allcomponents of the processor is main issue in designing. One of the most basic operational units in the processor is anALU. ALU is a critical component of a microprocessor and is the core component of central processing unit. This paperdescribes the design technique for low power, low area Arithmetic and logic unit design. The ALU is one of the mostfrequently accessed modules in a CPU and is utilized during most instruction execution. The power consumption ismain issue in designing. In our paper low power ALU design using reversible logic. Reversible logic is specialoptimization technique having its application in low power design. In our paper number of gate and power are reduced.The area of design also reduced in our proposed design
  • 关键词:ALU; reversible logic; full adder; arithmetic and logic operation; CMOS
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