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  • 标题:Implementation on Low Power Design Using Comparator for VLSI Design Circuit
  • 本地全文:下载
  • 作者:Uttam Kumar ; Ashish Raghuwanshi
  • 期刊名称:International Journal of Innovative Research in Computer and Communication Engineering
  • 印刷版ISSN:2320-9798
  • 电子版ISSN:2320-9801
  • 出版年度:2015
  • 卷号:3
  • 期号:2
  • DOI:10.15680/ijircce.2015.0302065
  • 出版社:S&S Publications
  • 摘要:A 8-bit 5GS/s streak simple to-advanced converter (ADC) is composed and reproduced in a 0.18μmCMOS innovation. Low-swing operation both in the simple and the computerized hardware brings about fast lowpower operation. The ADC disperses 30mW force from a 3.2V supply while working at 5GHz. Balanced averaging isutilized to minimize the impact of comparator balances. The estimation of greatest differential and indispensablenonlinearities (DNL and INL) of the Flash ADC are 0.2 LSB and 0.5 LSB separately. Simple to-advanced converter(ADC) has ended up fundamental structure for the vast majority of the hardware and correspondence frameworks.Comparator constitutes the fundamental part in simple to computerized transformation (ADC). It is essentially the firststage in ADC, which changes over the sign from simple to computerized space.
  • 关键词:Variable switching voltage; threshold inverter quantization; comparator; Flash ADC
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