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  • 标题:Low Power High Speed Differential Current Comparator
  • 本地全文:下载
  • 作者:Indrani Roy ; Suman Biswas ; B. S. Patro
  • 期刊名称:International Journal of Innovative Research in Computer and Communication Engineering
  • 印刷版ISSN:2320-9798
  • 电子版ISSN:2320-9801
  • 出版年度:2015
  • 卷号:3
  • 期号:4
  • DOI:10.15680/ijircce.2015.0304089
  • 出版社:S&S Publications
  • 摘要:A low power high speed differential current comparator having weak current operation has beenpresented in this paper. The comparator proposed is a three stage process. It utilizes a modified Wilson's current mirrorcircuit for current to voltage conversion for its first stage followed by differential amplifier stage and buffer stage. Thecurrent comparator is simulated using Cadence Virtuoso 0.18μm CMOS technology and it can successfully generatevalid output response for a range of input frequencies. Working at a supply of 1.8V, the comparator is capable ofsensing a minimum difference of 22nA for 4μA reference current. In addition power dissipation of this circuit is as lowas 226μW and shows a swift response resulting in a propagation delay which is less than 0.8ns for an input differenceof 1μA.
  • 关键词:current comparator; Wilson's current mirror comparator; single-ended differential amplifier; buffer;inverter
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