期刊名称：International Journal of Innovative Research in Computer and Communication Engineering
印刷版ISSN：2320-9798
电子版ISSN：2320-9801
出版年度：2015
卷号：3
期号：5
DOI：10.15680/ijircce.2015.0305096
出版社：S&S Publications
摘要：This paper presents performance analysis of Digital PWM control mode in DC-DC buck converter interms of power efficiency, line regulation and load regulation. Matlab/Simulink Models are built to facilitate theanalysis of various effects on power loss and conversion efficiency, including different load conditions. It introduces afully synthesizable hybrid digital pulse width modulator (DPWM) utilizing Σ‒Δ modulation technique to achieve bestpossible resolution of 12 bit. A type-II compensator is designed for the buck converter in order to achieve a stableclosed loop operation with desired performance. FPGA implementation is carried out for both type-II compensator andDPWM using Xilinx system generator tool. A load regulation of 4% with a response time of 200us is achieved for aload change of 0.4A to 0.8A.A line regulation of 2% with a response time of 100us is achieved for a line voltagechange of 3 to 4.5V. A Graph of conversion efficiency versus load current is obtained.
关键词：Buck Converter; Digital Pulse Width Modulator (DPWM); Field Programmable Gate Array (FPGA);Proportional Integral Derivative (PID); Sigma Delta (Σ‒Δ) modulator; Switch mode power supply (SMPS).
