期刊名称：International Journal of Innovative Research in Computer and Communication Engineering
印刷版ISSN：2320-9798
电子版ISSN：2320-9801
出版年度：2015
卷号：3
期号：7
DOI：10.15680/ijircce.2015. 0307050
出版社：S&S Publications
摘要：The field of digital electronics has been directly towards to the low power digital system. The use ofvery large scale integration technology in high performance computing, wireless communication, consumer electronicshas been rising at a very fast rate. The challenge for VLSI technology is growing in leakage power consumption. Wideutilizations of memory storage systems in modern electronics triggers a demand for high performance and low areaimplementation of basic memory component and one of the most state holding element is D Flip Flop. In this paperanalysis of power, delay, area and power delay product is done for D flip flop using different technologies like staticCMOS, C2MOS, POWER PC, GDI MUX, TSPC, etc. Low power Flip flops are useful for the design of low powerdigital system. The analysis and the comparison is done using TANNER EDA Tool at 130nm Technology.
关键词：Low power; CMOS; C2MOS; ;GDI MUX;TSPC; D Flip Flop; POWER PC
