期刊名称：Facta universitatis - series: Electronics and Energetics
印刷版ISSN：0353-3670
电子版ISSN：2217-5997
出版年度：2016
卷号：29
期号：1
页码：101-112
DOI：10.2298/FUEE1601101K
出版社：University of Niš
摘要：A binary-to-residues encoder (forward encoder) is an essential building block for the residue number system digital signal processing (RNS DSP) and as such it should be built with a minimal amount of hardware and be efficient in terms of speed and power. The main parts of the forward encoder are residue generators which are usually classified into two categories: the one based on arbitrary moduli-set which make use of look-up tables, and the other based on the special moduli sets. A new memory less architecture of binary-to-RNS encoder based on the special moduli set {2n−1,2n,2n+1} with embedded modulo 2n+1 channel in the diminished-1 representation is presented. Any of two channels (standard modulo 2n +1, or modulo 2n+1 in the diminished-1 representation) operation can be performed by using a single switch. The proposed encoder has been implemented on a Xilinx FPGA chip for the various dynamic range requirements. [Projekat Ministarstva nauke Republike Srbije, br. 32009TR]
关键词：RNS system; special moduli set; forward encoder; diminished-1 encoded channel; modulo carry save adders; Virtex FPGA
