期刊名称：International Journal of Electronics, Communication and Soft Computing Science and Engineering
印刷版ISSN：2277-9477
出版年度：2012
卷号：2
期号：5
出版社：IJECSCSE
摘要：This paper presents the VLSI architecture of pipeline digital filter. The pipeline architecture is an efficient structure for designing in real time embedded system. Our work concentrates on designing digital filter using MATLAB FDA tool. Then we have implemented this filter using 3 different pipeline structure, direct form-1, broad cast and fine grain. We tested our algorithm using Xilinx synthesis tool and then implemented on Spartan 3A family XC3S700A-4fg484 FPGA device. The experimental results shows that to design an area optimized filter we should use fine grain pipeline structure, where as for high speed, we should use direct form-1 structure of digital filter
