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  • 标题:Low Power and High Speed BCD Adder using Reversible Gates
  • 本地全文:下载
  • 作者:Pradeep S R ; Praveen Kumar ; Prathibha S R
  • 期刊名称:International Journal of Electronics, Communication and Soft Computing Science and Engineering
  • 印刷版ISSN:2277-9477
  • 出版年度:2013
  • 卷号:2
  • 期号:9
  • 出版社:IJECSCSE
  • 摘要:Reversible logic is one of the emerging technologies having promising applications in quantum computing. In this work, we present new design of the reversible BCD adder that has been primarily optimized for the number of ancilla input bits and the number of garbage outputs. Optimization of ancilla input bits and the garbage outputs may degrade the design in terms of the quantum cost and the delay. Firstly, we propose a new design of the reversible ripple carry adder having the input carry C0 and is designed with no ancilla input bits. The proposed reversible ripple carry adder design with no ancilla input bits has less quantum cost and the logic depth (delay) compared to its existing counterparts. The reversible design of the BCD adder is presented which is based on a 4 bit reversible binary adder to add the BCD number, and finally the conversion of the binary result to the BCD format using a reversible binary to BCD converter
  • 关键词:ancilla inputs; garbage outputs; Quantu m Cost; Reversible ripple carry adder
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