期刊名称：International Journal of Electronics, Communication and Soft Computing Science and Engineering
印刷版ISSN：2277-9477
出版年度：2015
卷号：4
期号：Special 3
出版社：IJECSCSE
摘要：Addressable Memory (CAM) is a keyelement in wide variety of applications. A major challenge inrealization of such systems is the complexities of scaling MOStransistors. Convergence of disparate technologies, which arecompatible with CMOS processing, may allow extension ofMoore’s Law for a few more years.This paper provides a new approach towards the designand modeling of memristor based CAM (MCAM) using acombination of MOS devices to form a core of a memory or logiccell that forms the building block of the CAM architecture. Thenon-volatile characteristics and the nanoscaled geometry togetherwith compatibility of the memristor with CMOS processingtechnology increases the packing density, provides for the newapproaches towards power management through disabling CAMblocks without loss of stored data, reduces power dissipation, andhas scope for speed improvement as the technology matures.Semiconductor memory arrays capable of storing largequantities of digital information are essential to all digitalsystems. The amount of memory required in a particular systemdepends on the type of application, but, in general, the number oftransistors utilized for the information (data) storage function ismuch larger than the number of transistors used in logicoperations and for other purposes. The Microwind 3.1 softwarewill allow designing and simulating an integrated circuit atphysical description level. The main novelties related to the 45nmtechnology are the high-k gate oxide, metal gate and very low-kinterconnect dielectric. The effective gate length required for45nm technology is 25nm. An efficient chip area is designed using45nm CMOS technology of high speed memristor based CAM i.e.MCAM cell.
