期刊名称：International Journal of Innovative Research in Science, Engineering and Technology
印刷版ISSN：2347-6710
电子版ISSN：2319-8753
出版年度：2015
卷号：4
期号：2
页码：318
DOI：10.15680/IJIRSET.2015.0402066
出版社：S&S Publications
摘要：A new trend in wireless communication systems has dictated the need for dynamical adaptation ofcommunication systems in order to suit environmental requirements. Wireless networks usually employ sophisticatedForward Error Correction (FEC) techniques such as Viterbi Algorithm to combat with the channel distortion effectssuch as multipath fading and intersymbol interference. Viterbi algorithm is employed in wireless communication todecode the Convolution codes; these are the class of FEC codes. Such decoders are complex & dissipates large amountof power. Thus this paper presents the design of an Adaptive Viterbi Decoder (AVD) that uses survivor path withparameters in an attempt to reduce the power and cost and at the same time increase in speed. Most of the researchesaimed to reduce power consumption or work with high frequency for using the decoder in the modern applications suchas 3 GPP, DVB, and wireless technology. Field Programmable Gate Array technology (FPGA) is considered as highlyconfigurable option for implementing many sophisticated signal processing tasks. The proposed viterbi decoder designis simulated on Modelsim.SE6.3f and implemented using VHDL code.
关键词：Viterbi Algorithm; Adaptive Viterbi Decoder; Field Programmable Gate Array; VHDL
