期刊名称：International Journal of Innovative Research in Science, Engineering and Technology
印刷版ISSN：2347-6710
电子版ISSN：2319-8753
出版年度：2015
卷号：4
期号：7
页码：5204
DOI：10.15680/IJIRSET.2015.0407023
出版社：S&S Publications
摘要：Low power consumption and high speed with compact size in digital devices are foremost necessity oftoday. FFT algorithm places an essential role while composing digital signal processing. This paper includes compactdesign of complex multiplier used for FFT Design. Complex Multiplier is proposed for twiddle factor multiplication.The design based on distributed arithmetic, Urdhva-tiryakbyham multiplier, and carry-look ahead adders has beendeveloped. The proposed design reduces complexity in multiplication which occurs during FFT operation. The workincludes simulation and verification of respective multiplier in 45 nm scale using tanner tool version 14.11.
