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  • 标题:Design and Implementation of Vending Machine using Verilog HDL on FPGA
  • 本地全文:下载
  • 作者:Abhishek Luthra ; Akshat Jain ; Parnika Mishra
  • 期刊名称:International Journal of Innovative Research in Science, Engineering and Technology
  • 印刷版ISSN:2347-6710
  • 电子版ISSN:2319-8753
  • 出版年度:2015
  • 卷号:4
  • 期号:11
  • 页码:11610
  • DOI:10.15680/IJIRSET.2015.0411137
  • 出版社:S&S Publications
  • 摘要:This paper describes the modeling of a Finite State based vending machine using the mealy machine model. The proposedmachine has been implemented on Spartan3 FPGA development board. The advantages of using this machine have been indicated in the paper. The whole design has been functionally verified using Xilinx 9.2i and Modelsim 6.2a simulator.A vending mach ine isa machine which dispenses items such as snacks, beverages, lottery tickets, consumer prod ucts to customers automatically after the customer inserts currency or credit into the machine. This paper compares different aspects as timing and device utilization of the proposed machine with the previously proposed machine 3 . Also the paper indicates a future possibility of a better ment over existing vending machines.
  • 关键词:Vending Machine; FPGA; Verilog ; ; Xillinx ISE simulator; Modelsim; FSM
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