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  • 标题:Design of a Power Optimal Reversible FIR Filter
  • 本地全文:下载
  • 作者:P.Rahul Reddy
  • 期刊名称:International Journal of Innovative Research in Science, Engineering and Technology
  • 印刷版ISSN:2347-6710
  • 电子版ISSN:2319-8753
  • 出版年度:2015
  • 卷号:4
  • 期号:12
  • 页码:12549
  • DOI:10.15680/IJIRSET.2015.0412165
  • 出版社:S&S Publications
  • 摘要:In present development, the reversible logic design fascinating more attention due to its low powerconsumption. Reversible logic is very significant in low-power circuit design. The imperative reversible gates used forreversible logic synthesis are Feynman Gate, Fredkin gate, Toffoli gate, and peres gate etc. In this paper, an efficientarchitecture of FIR filter structure is presented. For achieving low power, reversible logic mode of operation isimplemented in the design. It also gives brief idea to build adder circuits using the basic reversible gate like peres gateand TSG gate.
  • 关键词:Low-power VLSI; Low-power CMOS design; reversible logic; quantum cost
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