期刊名称：International Journal of Computer Applications and Information Technology
印刷版ISSN：2278-7720
出版年度：2012
卷号：1
期号：1
页码：19-21
出版社：Mahadev Educational Society
摘要：This paper enumerates low power, high speed design of Flip- Flops having less number of transistors and only one transistor being clocked by short pulse train which is true single phase clocking (TSPC) Flip-Flop. As transistors used have small area and low power consumption, they can be used in various applications like digital VLSI clocking s ystem, buffers, registers, microprocessors etc. The Flip-Flops are analyzed at 90nm, 70nm and 50nm technologies. As the technology is scaled down, the leakage power increases, which is reduced by using MTCMOS technique. The designed Flip-Flops and Latches are compared in terms of power consumption, propagation delays and power dissipation product using DSCH and Microwind tools
