摘要：The architecture described in this article is based on the data-flow computation model, in which computation is driven by processing a flow of data. The basic element of the data-flow architecture is the coordinating processor (CP), responsible for controlling and organizing the execution of instructions. As to its structure, the CP is designed as a dynamic, multi-functional system. When executing the operations, the CP may acquire various states, therefore it is a dynamic pipelining system. The transitions and the order of the states between two transitions depend on the type of the operator processed at the time of interpreting the flow of operands. This article details the microprogram control of single-input operators.
