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  • 标题:Design and Analysis of a maximum length 5-Bit Parallel Linear Feedback Shift Register using VHDL Structural Modeling
  • 本地全文:下载
  • 作者:Ria Ghosh ; P. Gowtami ; Shiv Dutta Mishra
  • 期刊名称:International Journal of Innovative Research in Computer and Communication Engineering
  • 印刷版ISSN:2320-9798
  • 电子版ISSN:2320-9801
  • 出版年度:2016
  • 卷号:4
  • 期号:4
  • 页码:6750
  • DOI:10.15680/IJIRCCE.2016.0404067
  • 出版社:S&S Publications
  • 摘要:Very Large Scale Integration is the latest most popular technology that has reduced the size of almost all electronic circuits and devices to a large extent.Out of the two coding languages for VLSI simulation i.e. Verilog and VHDL, the latter is the most preferred option for present designing because of its variety and efficiency in simulations.In this paper we present the design andanalysis of a5-bit Linear Feedback Shift Register (LFSR) through the Structural Modeling method of VHDL coding.The paper aims at highlighting the design advantages and drawbacks of structural modeling over the other types of design modelling in VHDL, while creating a maximum length 5-bit LFSR using the software Xilinx9.2i.Moreover, Structural VHDLwhich has only been used for circuits with one or two components, if used to design more complex circuits can help the practical software visualization of these circuits possible, making the error corrections and technical advancements very easy
  • 关键词:Structural Modeling;LFSR; Behavioral Modeling; VHDL
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