摘要：This paper considers the issue of high power dissipation in test mode, and puts forward a novel technique based on the reordering of test vectors. This approach considers both the circuit structure and test set. The proposed approach uses a weight to quantify the relationship between the switching of each input and the internal switching activity, then reorder test set based on these weights. Results of experiments show reductions of the switching activity ranging from 17.06% to 69.22% during external test application.
