期刊名称：International Journal of Innovative Research in Science, Engineering and Technology
印刷版ISSN：2347-6710
电子版ISSN：2319-8753
出版年度：2014
卷号：3
期号：4
页码：10982
出版社：S&S Publications
摘要：In this paper a technique to reduce the leakage power in the register file is presented. Power gating is one ofthe commonly used technique to reduce the subthreshold leakage current. But as the technology scales down, the effect ofthe leakage current increases since the supply voltage and the threshold voltage also has to be scaled down with technologyscaling. With the power gating technique applied to the register file, it introduces a continuous leakage from the dataretention element used to store the data. Since, it has to be powered up always to hold the data present in the register file.Thus an alternative technique called the supply switching with ground collapse technique (SSGC) is implemented wherethe supply is switched from the normally applied supply voltage to the lower voltage under the standby condition to reducethe leakage current compared to power gating technique. In this paper both of the above mentioned techniques is applied tothe register file array of 8x8 with multiple read and write ports and leakage analysis is carried out in a Vdd=1V, 45nmCMOS technology. Also in this paper, the voltage and temperature variation is done to show the power variations.
关键词：Leakage; Standby mode; Power gating; Register file; Low power
