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  • 标题:DESIGN OF 8-PORT ADAPTIVE NETWORK ON CHIP
  • 本地全文:下载
  • 作者:A.Prasannah Rajasingh ; S.Rajkumar
  • 期刊名称:International Journal of Innovative Research in Science, Engineering and Technology
  • 印刷版ISSN:2347-6710
  • 电子版ISSN:2319-8753
  • 出版年度:2014
  • 卷号:3
  • 期号:4
  • 页码:11768
  • 出版社:S&S Publications
  • 摘要:Networks-on-chip (NoCs) have emerged asa promising on-chip interconnect for futuremulti/many-core architectures as NoCs are able toscale communication links with the growing numberof cores. In this paper, we present an adaptive routeallocation algorithm which provides a required levelof QoS (guaranteed bandwidth) coupled with anadaptive buffer assignment scheme which reassignsbuffer blocks up-demand.Inaddition, the adaptivityrequires a comprehensive, hardly invasive, runtimediscernibility infrastructure, i.e., using supervisingcomponents, in order to collect data on the systemput forward. The area overhead brought in by theadaptive scheme can be traded off against thetractability acquired. furthermore, the areaoperating cost is also reduced by resourcemanifolding due to the on-demand buffer assignmentat each output port (we achieved on an average 42%buffer saving in our experiments).The proposednetwork-On-Chip can be modelled using VerilogHDL and simulated using Modelsim software.
  • 关键词:Network on chip (NOC); Quality of;Service (QOS); Bandwidth; Multi- Manycore.
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