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  • 标题:Performance Improvement of Low Power Double Tail Comparator in UDSM CMOS Technology
  • 本地全文:下载
  • 作者:N.Bhuvaneswari ; V.Gowrishankar ; Dr.K.Venkatachalam
  • 期刊名称:International Journal of Innovative Research in Science, Engineering and Technology
  • 印刷版ISSN:2347-6710
  • 电子版ISSN:2319-8753
  • 出版年度:2014
  • 卷号:3
  • 期号:4
  • 页码:11837
  • 出版社:S&S Publications
  • 摘要:In this paper, we present a performance comparisonof dynamic comparators. As delay is directly correlated withthe submicron scaling, we investigate the performance of theabove comparators in terms of delay and Power-DelayProduct (PDP). PDP gives the average energy dissipated bythe comparator for a single comparison. Simulation resultsusing Tanner EDA revealed better performance of High SpeedDynamic Comparator (HSDC) compared to conventionalclocked comparators in 180nm, 250nm and 350nmtechnologies. Implementation results reveal that high speeddynamic comparator has energy dissipation compared to thebest of the designs used for comparison in 180nm technology,when operated at 50 MHz.
  • 关键词:Ultra Deep Sub Micrometer (UDSM);Dynamic;Comparator; Flash ADCs; Common Mode Voltage
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