期刊名称：International Journal of Innovative Research in Science, Engineering and Technology
印刷版ISSN：2347-6710
电子版ISSN：2319-8753
出版年度：2015
期号：NCETAS
页码：118
出版社：S&S Publications
摘要：Power dissipation is the most commonly concerned issue in the low power VLSI design circuits. The aimof the paper is to reduce power or energy dissipation. We have used the technique of adiabatic switching based ondifferent logic to achieve VLSI circuit design with low power. It is proposed by implementing pmos and nmos transistorsas pull up and pull down network. In this paper the power dissipation of various adiabatic 4:1 multiplexers (DCVSL,MDCVSL) is calculated and then simulated using T-SPICE tool. We have also implemented the multiplexing techniqueusing Transmission Gate Logic (TGL). From the calculated result it is obvious that the multiplexer using adiabatic logicand TGL can effectively reduce the power dissipation as compared to the conventional CMOS design. From the resultsof calculation it is observed that among the discussed logic used for multiplexer implementation TGL exhibits theminimum power dissipation.
