期刊名称：International Journal of Innovative Research in Science, Engineering and Technology
印刷版ISSN：2347-6710
电子版ISSN：2319-8753
出版年度：2014
期号：ICETS
页码：1558
出版社：S&S Publications
摘要：The Discrete Wavelet Transform (DWT)is one of the powerful signal processing tools. It hasbeen effectively used in wide range of applicationsincluding image processing, speech analysis, patternrecognition and biometrics. Large amount ofmemory is required for storing the intermediatevalues for the implementation of Two DimensionalDiscrete Wavelet Transform. TranspositionMemory (TM) requirement is the major concernfor the Two Dimensional 5/3 mode and 9/7 modeLifting Based Discrete Wavelet Transform(LDWT). Interlaced Read Scan algorithm isproposed to achieve a Memory Efficient hardwareArchitecture for 2-D Dual Mode Lifting BasedDiscrete Wavelet transform, that reduces the TM.For Hardware Simplicity, Multiplier-lessarchitecture is proposed which is applicable forboth lossy and lossless coding.
关键词：2-D Dual Mode Lifting Based Discrete;Wavelet Transform; Transposition Memory (TM).
