期刊名称：International Journal of Innovative Research in Science, Engineering and Technology
印刷版ISSN：2347-6710
电子版ISSN：2319-8753
出版年度：2014
期号：ICETS
页码：1559
出版社：S&S Publications
摘要：The aim of this project is to attain anencrypted pre configured logic function forFPGA.Such a function should have a security valuessuch as resistant to Differential Power Analysis(DPA) Attacks and it should also be free fromcloning or duplication.AES-Rijndael Algorithmwhich is a block Cipher is used for encryption insome of cryptographic devices such as smart cards,RFIDs can be attacked with the help of the amountof data. The FPGA is processing and the operation itperforms over those data by measuring the timetaken for the process and also the power consumedduring the process. This cryptanalytic technique iscalled as Side Channel Attacks (SCA).Among suchattacks we are focussing on the power consumed bythe process and terming it as Differential PowerAnalysis (DPA) attack.Here our objective is to takepreventive steps to make our data and its operationindependent of power it consumes such thatpossibility of DPA attacks can be greatly reduced.Further, The Secure Hashing Algorithm is appliedin to an AES, it takes an arbitrary bit string as inputand returns a fixed length string as output. The hashvalue is nearly impossible to derive the originalinput number without knowing the data used tocreate the hash value.
