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  • 标题:Effective Estimation of Peak-Power for a Testable Digital Circuit
  • 本地全文:下载
  • 作者:M. Radha Rani ; G. Rajesh Kumar ; A. Karna Rao
  • 期刊名称:International Journal of Advanced Research in Computer Engineering & Technology (IJARCET)
  • 印刷版ISSN:2278-1323
  • 出版年度:2012
  • 卷号:1
  • 期号:7
  • 页码:125-129
  • 出版社:Shri Pannalal Research Institute of Technolgy
  • 摘要:Peak power corresponds to the highest value of instantaneous power measured during testing. The peak power generally determines the thermal and electrical limits of the circuit and the system packaging requirements. High peak power in only one clock cycle can be an issue if it results in a significant ground bounce or an IR-drop phenomenon that causes a memory element to lose its state and the test procedure to unnecessarily fail. Tools for evaluating the worst-case peak-power consumption of sequential circuits are strongly required by designers of low-power circuits. Previously proposed methods search for the initial state and the couple of vectors with maximum consumption, without exploiting the information on the reachable state set during the power estimation process. This paper shows that this can lead to significant underestimation of the maximum power consumption, and proposes an algorithm for overcoming this drawback.
  • 关键词:Peak Power; Instantaneous Power; IR- ; Drop; Worst-Case peak power; Test Vectors
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