期刊名称：International Journal of Advanced Research in Computer Engineering & Technology (IJARCET)
印刷版ISSN：2278-1323
出版年度：2013
卷号：2
期号：3
页码：998-1001
出版社：Shri Pannalal Research Institute of Technolgy
摘要：AES is the most effective algorithm for network security that is more confidential, reliable and robust. A key step in the Advanced Encryption Standard (AES) algorithm is the subbyte transformation and its inverse . The hardware implementation of such nonlinear parts however leads to an erroneous output due to the faults that occurs accidentally or intentionally. To overcome these faults a concurrent fault detection scheme must be adopted. In this paper, the composite field s box and inverse S box are divided into blocks and the predicted parities of these blocks are obtained. The faults are being injected in the sub byte input and the corresponding fault detection has been carried out. The comparison between the normal SBox and the composite field Sbox has been done using Xilinx 9.1 ISE and the corresponding simulation has been done using Modelsim software. The resulting area report reveals the better method for the efficient fault detection scheme of AES algorithm.
