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  • 标题:Comparative Performance Analysis of Different CMOS Adders Using 90nm and 180nm Technology
  • 本地全文:下载
  • 作者:Jatinder Kumar ; Parveen Kaur
  • 期刊名称:International Journal of Advanced Research in Computer Engineering & Technology (IJARCET)
  • 印刷版ISSN:2278-1323
  • 出版年度:2013
  • 卷号:2
  • 期号:8
  • 页码:2504-2507
  • 出版社:Shri Pannalal Research Institute of Technolgy
  • 摘要:Adders are key components of digital design and are necessary part of any digital signal processor (DSP) architecture and microprocessors. Apart from the basic addition they also perform other operations such as subtraction, multiplication, division, address calculation. Adders of various bit widths are frequently required in Very Large Scale Integration (VLSI) circuits from processors to Application Specific Integrated Circuits. In most of these systems the adder lies in the critical path that determines the overall performance of the system. In this paper, different type of 8-bit full adders are analyzed and compared for transistor count, power dissipation, delay and power delay products. The investigation has been carried out with simulation runs on Tanner environment using 180nm & 90nm CMOS process technology at 2V. The result shows that the carry skip adder has the lowest power-delay product.
  • 关键词:Carry Select Adder; Carry Increment Adder; ; Carry Skip Adder; Carry Look-Ahead Adder; Area-Efficient; ; 8-Bit Adder; CMOS; Power Delay Product
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