期刊名称：International Journal of Advanced Research in Computer Engineering & Technology (IJARCET)
印刷版ISSN：2278-1323
出版年度：2014
卷号：3
期号：3
页码：1001-1005
出版社：Shri Pannalal Research Institute of Technolgy
摘要：In adders the truncation and round off errors cannot be ignored. A new type of adder that is error tolerant adder (ETA) is proposed to tolerate those errors and to attain low power consumption. To rectify the errors in adders error tolerant adder (ETA) is proposed here. It increases the performance & reduces the delay by low power consumption. ETA mainly focuses on low power VLSI applications. ETA compensates the errors by adding the inputs parallel. In this paper to prove the efficiency of ETA normal CMOS XOR logic is replaced by, PASS TRANSISTOR logic.
关键词：About four key words or phrases in ; alphabetical order; separated by commas
