期刊名称：International Journal of Advanced Research in Computer Engineering & Technology (IJARCET)
印刷版ISSN：2278-1323
出版年度：2014
卷号：3
期号：6
页码：2168-2171
出版社：Shri Pannalal Research Institute of Technolgy
摘要：Today in digital technology the ever increasing demand in enhancing the ability of processors to handle the complex and challenging processes has resulted in the integration of a number of processor cores into one chip. Still the load on the processor is not less in generic system. This load is reduced by supplementing the main processor with Co-Processors, which are designed to work upon specific type of functions like numeric computation, Signal Processing, Graphics etc. in which MAC Unit is most dominant Co-Processor and work as heart of digital signal processors. Faster Operations are of extreme importance in MAC Unit. The speed of MAC Unit depends greatly on the multiplier; after deep study and analysis we found that the efficiency of Urdhva Triyakbhyam-Vedic method for multiplication is much better in the comparison to other conventional multipliers, which strikes a difference in the actual process of multiplication itself. It enables parallel generation of intermedUrdhvaiate products. This Sutra was traditionally used in ancient India for the multiplication of two decimal numbers in relatively less time. Many researchers and scientists have done intensive research upon this multiplier at different level, and introduced so many architectures to further enhance the speed of conventional Vedic multiplier. We have seen that out of these CSA based Vedic multiplier architecture, proposed by Abhishek Gupta, provides much better result in terms of speed. In this paper, after a gentle introduction of this Sutra, we have represented the digital circuitry for this CSA based Vedic multiplier. Then we have proposed digital hardware for MAC Unit using this proposed multiplier. After this we have provided comparative results of Vedic multiplier, proposed by Abhishek and proposed design for MAC unit shows improvement of speed over the conventional designs of MAC unit.
关键词：Vedic multiplier; Urdhva Triyakbhyam sutra; Carry ; Save Adder (CSA); MAC Unit
