期刊名称：International Journal of Advanced Research in Computer Engineering & Technology (IJARCET)
印刷版ISSN：2278-1323
出版年度：2014
卷号：3
期号：7
页码：2429-2434
出版社：Shri Pannalal Research Institute of Technolgy
摘要：In current scenario high- resolutionADC architecture based on a resetting modulator required high gain operational Transcoductace Amplifier (OTA)and quanitizerin low-voltage nanometer-scale CMOSprocesses because of good speed and calibration-free response are becoming more popular in communication system. Proposed work achieves such high resolution, despite poor component matching using Folded cascodeOTA and two different 1bit and 1.5 bit quantizerwithswiched capacitor Modulator design toreduced thermal noise and a possible optimization of power consumption.Above Quantizeris& OTA in Resetting modulator designed and simulated using H-SPICE having very low power consumptionin 130nm TSMC CMOS technology.
