期刊名称：International Journal of Advanced Research in Computer Engineering & Technology (IJARCET)
印刷版ISSN：2278-1323
出版年度：2014
卷号：3
期号：9
页码：3121-3125
出版社：Shri Pannalal Research Institute of Technolgy
摘要：COMPARATOR is the basic module in digital system. It is widely used in communication and calculation areas. The main objective of this paper is to provide new low power, area solution for very large scale integration (VLSI) designers. We can design the circuits at gate level as well as transistor level but designing the circuits at gate level is never equivalent to designing the circuits at transistor level since transistor level circuit design is lower level of design abstraction when compared to gate level. At circuit level, STATIC CMOS logic style can give better results over others when we design efficiently.In this project the proposed comparator has been designed by using STATIC CMOS 180nm TECHNOLOGY.
