期刊名称：International Journal of Advanced Research in Computer Engineering & Technology (IJARCET)
印刷版ISSN：2278-1323
出版年度：2015
卷号：4
期号：10
页码：3982-3986
出版社：Shri Pannalal Research Institute of Technolgy
摘要：COMPARATOR is an important block in digital system. It has applications in communication and calculation areas. The main intention of this paper is to provide new low power, low area solution for designers at transistor level. We can design the circuits based on finding equivalent Boolean expressions and then converting that Boolean expressions to a circuit, but this kind of approach never gives ultimate optimization, instead conditions based design is a good approach if we can design efficiently. At circuit level, STATIC CMOS logic style can give better results when doing the layout because of its uniform structure. Layout designer can efficiently convert a STATIC CMOS based circuit to a layout over others. In this project the proposed comparator has been designed by using STATIC CMOS 180nm TECHNOLOGY and the tool being used is TANNER EDA tool.
